This invention relates generally to double gate silicon on insulator semiconductor integrated circuits.
As silicon approaches its scaling limits, double gate field effect transistors are attractive ways to achieve smaller gate lengths for the same oxide thicknesses. Double gate silicon over insulator structures are considered to be the most scalable technology down to an 0.02 micron regime. Such devices can have higher gain than conventional single gate transistors.
However, the fabrication of double gate transistors generally involves complex processing and/or the use of polycrystalline silicon thin films for the device layers sandwiched between the two gates. Since the polycrystalline film is not a single crystal, the electronic quality may be degraded compared to structures using single crystal material.
Thus, there is a need for less complex ways of producing greatly scaled transistors having adequate electronic qualities.